Senior Verification Engineer
Renesas Electronics Corporation delivers trusted embedded design innovation with complete semiconductor solutions that enable billions of connected, intelligent devices to enhance the way people work and live. A global leader in microcontrollers, analog, power, and SoC products, Renesas provides comprehensive solutions for a broad range of automotive, industrial, home electronics, office automation, and information communication technology applications that help shape a limitless future.In 2019 Renesas completed the acquisition of Integrated Design Technology Inc. (IDT). Together with IDT, Renesas delivers an even broader range of leading-edge technology and embedded solutions by combining IDT’s RF, high-performance timing, memory interface, real-time interconnect, optical interconnect, wireless power and smart sensors with Renesas microcontrollers, system-on-chips and power management ICs. This combined portfolio enables the creation of new classes of products and solutions in fast-growing, data-economy applications across different verticals, including industrial, infrastructure and automotive segments, for customers and partners across the globe.Renesas Design Bulgaria EOOD – former IDT Bulgaria EOOD, was established in 2008 with main focus on design of ASICs and ASSPs for automotive industry, and all related activities. Renesas's design centers in Bulgaria are located in Sofia and Varna.
To further our Automotive Solution Business Unit we are looking for an experienced
Senior Verification Engineer (f/m/d)
Your Role:
• Verification of functional behavior of digital/mixed-signal systems;
• Verification of microcontroller systems together with firmware;
• Extract objectives/requirements from specifications and review with system architect;
• Create verification plans;
• Create/support verification environments on block and system levels;
• Definition and implementation of test scenarios at system and block level;
• Development of test-benches and verification components;
• Development of behavioral models for analog components and modules;
• Regression and coverage analysis;
• Interface with system architect and design engineers.
Your profile:
• Relevant educational background (electronics or software);
• 3+ years of digital verification experience;
• Knowledge of HDL languages – SystemVerilog is a must;
• Good understanding and hands-on experience of the constrained random verification;
• Practical skills with UVM, SVA, OVL or similar methodologies;
• Strong motivation for technical challenges;
• Team player, excellent communication skills;
• Fluent in English, ideally also in Bulgarian.
• Knowledge of Cadence design/verification tools is a plus.
Please note that only shortlisted applicants will be contacted.
За обявата
June 10th, 2022
Варна
Административни, Офис и Бизнес дейности
За обявата
June 10th, 2022
Варна
Административни, Офис и Бизнес дейности